The present invention concerns a high voltage transistor used for various circuits such as amplifiers, power converters, instrumentation and the like.
In the prior art, high voltage p-channel metal-oxide-silicon (PMOS) transistor have been integrated onto circuits. See for example, the PMOS transistor disclosed by Vladimir Rumennik, David L. Heald, Integrated High and Low Voltage CMOS Technology, IEEE 28th Int. Electron Devices Meeting, pp. 77-80, 1982. In this prior art scheme the PMOS transistor is connected in series with an extended drain p-drift (or offset) region. P-type impurities (e.g. Boron) are introduced in the drift region by ion implantation after a polysilicon layer is formed to provide self-alignment to the gate. The charge of the p-drift region is uniquely defined by the charge matching with the underlying n-well charge. Specifically, the maximum electric field is a function of the doping level in the p-offset channel and the well and is sensitive to the charge mismatch between them. The need to control the charge in the p-drift regions requires a closely controlled Boron implant into the p-drift region.
Several difficulties exist in the above-described prior art system. For example, since the polysilicon gate is used to mask the p-type implant in the drift region, the implant energy must be limited to avoid penetrating the polysilicon. Thus, the impurity distribution in the drift region is relatively shallow. Also, only a deposited thick oxide may be used since a long thermal oxidation cycle would consume the polysilicon. The combination of a shallow diffusion in the drift region and an inferior deposited oxide leads to reduced breakdown voltages and decreased transistor reliability.
Another disadvantage is that a relatively high on-state resistance of the transistor results from the conductivity of the p-channel and the drift region being lower than the conductivity of n-channel transistors. The on-resistance of the p-channel device is significantly influenced by the net concentration of the p-type impurities. However, as discussed above, the concentration of the p-type impurities cannot be arbitrarily increased to maintain balance compensating charge as this would detrimentally affect drain break down voltage (BVD).